A typical computer system includes at least a microprocessor and some form of memory. The microprocessor has, among other components, arithmetic, logic, and control circuitry that interpret and execute instructions necessary for the operation and use of the computer system. FIG. 1 shows a typical computer system (10) having a microprocessor (12), memory (14), integrated circuits (16) that have various functionalities, and communication paths (18), i.e., buses and wires, that are necessary for the transfer of data among the aforementioned components of the computer system (10).
The various computations and operations performed by the computer system are facilitated through the use of signals that provide electrical pathways for data to propagate between the various components of the computer system. In a general sense, the passing of data onto a signal may occur by either raising the voltage of the signal or reducing the voltage of the signal. When the voltage is raised, the signal is said to be at a “logic high,” and when the voltage is reduced, the signal is said to be at a “logic low.” Changes in the voltage value of a signal are accomplished by charging and discharging capacitors associated with the signal wire on which the signal resides. A capacitor with a potential difference across its terminals is considered to be a charged capacitor, and a capacitor with no potential difference across its terminals is considered to be a discharged capacitor. Therefore, a charging event is described as a process by which potential difference is created across the terminals of a capacitor by delivering charge to the capacitor. A discharging event is described as a process by which the potential difference across the terminals of a capacitor is removed by removing the charge stored in the capacitor.
Because signals within an integrated circuit are often in close proximity to each other, there is a propensity for the behavior of one signal to affect the behavior of another signal. This occurs due to intrinsic capacitances (also referred to and known as “cross-coupling capacitance”) that develop between signals at different logic levels. For example, some amount of cross-coupling capacitance is likely to develop between two signals that are relatively close together, where one signal is at a logic high and the other is at a logic low. When one of the signals switches state, noise may be injected on the other signal, causing the other signal to glitch, i.e., an electrical spike occurs. Such undesired behavior on the non-switching signal may lead to performance degradation because the noise injected on the non-switching signal can propagate to other parts of the processor causing timing failures and/or circuit malfunction.
An approach that designers have used to combat such cross-coupling capacitance induced behavior involves the use of wires to “shield” a signal from other signals. The purpose of shielding is to place wires next to the signal wire that do not make any transitions. To this end, FIG. 2 shows a typical signal shield implementation. In FIG. 2, a signal driver (20) outputs a signal (22) that is shielded by a first wire (24) and a second wire (26), where the first wire (24) is operatively connected to logic high, i.e., a voltage source (28), and the second wire (26) is operatively connected to logic low, i.e., ground (30). The signal driver (20) is also connected to power supply terminals (36, 38); however, the power supply terminals (36, 38) of the signal driver (20) may be different from the power supply terminals (28, 30) of the shield wires (24, 26). In any event, the placement of the shield wires (24, 26) creates capacitances (32, 34) between the respective shield wires (24, 26) and the signal wire (22). In sum, because of such a signal shield implementation, other signals in close proximity to the signal (22) are not affected by the switching behavior of the signal (22) due to the fact that the signal (22) is shielded by wires (24, 26) that have constant values when the signal (22) switches state.
Referring now to FIG. 2b, when the signal (22) transitions from low to high, charge is delivered from the power supply terminal (36) of the signal driver (20) to the signal (22) and on to the second wire (26). As shown by the charge paths in FIG. 2b, charge flows through the capacitors (34) between the signal (22) and the second wire (26) to the ground terminal (30) of the second wire (26). Thus, in effect, the capacitors (34) between the signal (22) and the second wire (26) get charged. Alternatively, as shown by the discharge paths in FIG. 2b, the delivery of charge to the signal (22) causes the capacitors (32) between the signal (22) and the first wire (24) to discharge due to the capacitors (32) getting subjected to equal voltage terminals.
Referring now to FIG. 2c, when the signal (22) transitions from high to low, charge is delivered from the power supply terminal (28) of the first wire (28) to the signal (22) and to the ground terminal (38) of the signal driver (20). As shown by the charge paths in FIG. 2c, charge flows through the capacitors (32) between the first wire (24) and the signal (22) to the ground terminal (38) of the signal driver (20). Thus, in effect, the capacitors (32)1 between the first wire (24) and the signal (22) get charged. Alternatively, as shown by the discharge paths in FIG. 2c, the delivery of charge to the signal (22) causes the capacitors (34) between the signal (22) and the second wire (26) to discharge due to the capacitors (34) getting subjected to equal voltage terminals.
Referring now to both FIGS. 2b and 2c, because charge is drawn by particular capacitors when the signal driver (20) switches the state of the signal (22), a charging event is said to be a “global event” in that the charging of the capacitors by the signal (22) interacts with the distribution of charge to capacitors positioned elsewhere in an integrated circuit. In other words, a charging event requires charge sharing among particular capacitors in the integrated circuit. Thus, during a charging event, there is a potential chance of switching drivers interacting with each other and adversely affecting the performance and behavior of other signal drivers.